INITIALIZING 3D KINEMATICS...
HERO TRAJECTORY
0%
SYSTEM ACTIVE // 2026
VIEWS:SYNC...

Abhishek Ahirrao

Electronics & Telecommunication Engineering Student

Embedded Systems • Simulation • FPGA • Autonomous Systems

Building real-world embedded systems, low-latency telemetry, and FPGA digital logic at K.K. Wagh Institute of Engineering Education & Research (SPPU).

SIH 2025
1st Prize ₹1.5LOut of 50,000+
ACADEMICS
8.69 CGPAPeak 9.00 SGPA
SPACE CLUB
Avionics LeadTeam Antariiksh
RESEARCH
2 PapersPublished
AUTONOMOUS SYSTEMS // KINEMATICS

Deterministic Cyber-Physical Prototyping

Connecting mathematical vehicle dynamics to physical microcontrollers. From FreeRTOS task priority assignment on ESP32 to low-latency ESP-NOW peer-to-peer telemetry and Artix-7 RTL logic synthesis.

32ms P2P LATENCYROADRUNNER 3D DYNAMICSHARDWARE-IN-THE-LOOP
TRANSITION // 05 FLAGSHIP SYSTEMS

Entering Hanging Projects Rail

Scroll to explore physical vehicle controls, digital twins, FPGA deduplication, and avionics flight instrumentation.

VERTICAL SCROLL CONTROLS HORIZONTAL RAIL
SCROLL TO OPERATE KINEMATICS
WORK // FLAGSHIP HARDWARE & SOFTWARE

Selected Projects

01
05
01/ 05
Simulation & Digital Twin DeveloperDec 2025

TwinX — AI-Powered Digital Twin Platform for Indian Traffic Simulation

High-fidelity Indian traffic simulation platform combining RoadRunner 3D road models, MATLAB/Simulink vehicle dynamics, and AI scenario generation. Contributed to winning 1st Prize nationally at Smart India Hackathon 2025 out of 50,000+ teams.

MATLABSimulinkRoadRunnerAutomated Driving ToolboxPython
TwinX — AI-Powered Digital Twin Platform for Indian Traffic Simulation
ASSET // VERIFIED ASSET
02/ 05
Embedded Software DeveloperFeb 2026 – Present

V2V-Based Autonomous Vehicle Control Prototype Using Edge Computing

Engineered dual-core ESP32 vehicle nodes executing an ESP-NOW peer-to-peer telemetry loop with sub-10ms packet dispatch. Integrated MPU6050 inertial sensing, ultrasonic ranging, and Time-To-Collision (TTC) safety logic to control throttle and automated braking.

ESP32Embedded CFreeRTOSESP-NOWMPU6050Ultrasonic SensorsPWM
V2V-Based Autonomous Vehicle Control Prototype Using Edge Computing
ASSET // VERIFIED ASSET
03/ 05
Team Lead & RTL Design DeveloperApr 2026

FPGA-Based Real-Time Image Deduplication Engine for Edge Wildlife Monitoring

Designed a Verilog HDL pipeline that constructs 64-bit perceptual image signatures in hardware registers and performs clock-cycle Hamming-distance comparison against cached references. Synthesized on Artix-7 FPGA, winning 1st Prize at the Unplugged Hackathon.

Verilog HDLXilinx VivadoModelSimArtix-7 FPGARTL Design
FPGA-Based Real-Time Image Deduplication Engine for Edge Wildlife Monitoring
ASSET // VERIFIED ASSET
04/ 05
Embedded Hardware DeveloperApr 2024 – May 2024

Mobile-Controlled Smart Home Automation System

Developed an ESP32-based multi-channel appliance switching system with optocoupler galvanic isolation between 3.3V logic and AC mains. Implemented non-blocking state firmware for reliable wireless control.

ESP32Arduino C++Relay DriversWi-FiGPIO Switching
Mobile-Controlled Smart Home Automation System
ASSET // VERIFIED ASSET
05/ 05
Research Intern (BSERC)Dec 2025 – Jan 2026

Automated Parametric Optimization for Water Rocket

Developed automated MATLAB/Simulink and OpenRocket aerodynamic models to optimize water-fill ratios, launch pressures, and apogee trajectories across multiple flight simulation scenarios during research internship at BSERC.

MATLABSimulinkOpenRocketTrajectory DynamicsOptimization
Automated Parametric Optimization for Water Rocket
ASSET // VERIFIED ASSET
CAREER // AEROSPACE & FIRMWARE ROLES

Engineering Experience

01 / 02 // 2025 ➔ PRESENT
Dec 2025 – Jan 2026

Bharat Space Education Research Centre

Winter Research Intern

Developed automated parametric simulation and optimization workflows for water rocket propulsion and aerodynamics. Analyzed water-fill ratios, chamber pressures, and apogee trajectories using MATLAB, Simulink, and OpenRocket.

Bharat Space Education Research Centre
ASSET // AVIONICS / AEROSPACE
MATLABSimulinkOpenRocketTrajectory Dynamics
2025 – Present

Team Antariiksh (Space Club of KKWIEER)

Avionics Sub-Lead

Leading avionics subsystem architecture, flight computer verification, and embedded hardware validation. Coordinating telemetry acquisition, sensor bus interfacing, and prototyping environments.

Team Antariiksh (Space Club of KKWIEER)
ASSET // AVIONICS / AEROSPACE
AvionicsEmbedded SystemsFlight ComputerSensor Buses
PROFILE // IDENTITY

Engineering Background

NASHIK, MH // SPPU AFFILIATED
Abhishek Ahirrao
ASSET // VERIFIED ASSET
Abhishek AhirraoENTC 2023–2027

I am an Electronics & Telecommunication Engineering student at K.K. Wagh Institute of Engineering Education & Research (SPPU), passionate about embedded systems, real-time firmware, and FPGA digital design.

My hands-on work focuses on turning hardware and mathematical models into working systems — from programming dual-core ESP32 microcontrollers with FreeRTOS and low-latency ESP-NOW wireless communication to synthesizing digital logic on Xilinx Artix-7 FPGAs and simulating dynamic control systems in MATLAB/Simulink.

Embedded & RTOS

Deterministic FreeRTOS tasks, peripheral drivers, and low-latency execution.

RTL & Digital Logic

Verilog HDL synthesis on Artix-7 FPGAs and timing verification in ModelSim.

Control & Simulation

MATLAB/Simulink dynamic system modeling and V2V wireless protocol verification.

ACADEMIC TRACK // CREDENTIALS

Education & Milestones

K.K. WAGH IEER • 2023–2027
2023 – 2027 // CURRENT ENROLLMENT
K.K. Wagh Institute of Engineering Education & Research, Nashik

B.Tech. Electronics & Telecommunication Engineering

Specializing in Embedded Systems, Real-Time Firmware, Hardware–Software Integration, Serial & Bus Protocols (CAN, SPI, I²C, ESP-NOW), and RTL Design on Artix-7 FPGAs.

CUMULATIVE CGPA8.69 / 10Up to Sem VI
HIGHEST SGPA9.00 / 10Peak Term
Core Coursework & Specialized Laboratory Domains:
Embedded Systems DesignMicrocontrollers & Real-Time OSDigital VLSI / Verilog HDLSerial & Wireless TelemetryControl Systems EngineeringDigital Signal Processing
K.K. Wagh Institute of Engineering Education & Research, Nashik
ASSET // INSTITUTE
2021–2023 // COMPLETED

Higher Secondary Certificate (HSC) — Science Stream

Bhonsala Military College, Nashik
JEE MAIN PERCENTILE: 87.51 %ileHSC BOARD SCORE: 65.17%

Rigorous analytical aptitude foundation in Advanced Mathematics, Classical Physics, and Physical Chemistry.

Bhonsala Military College, Nashik
ASSET // RECORD
2021 // COMPLETED

Secondary School Certificate (SSC)

St. Peters English Medium School, Nashik
SSC BOARD EXAMINATION: 91.20%

Foundational scholastic training with distinction in Mathematics and General Sciences.

St. Peters English Medium School, Nashik
ASSET // RECORD
DOMAINS // TOOLCHAIN & METHODOLOGIES

Technical Disciplines

6 CORE DOMAINS // INTERACTIVE DOSSIER
MCU

Embedded Systems

Firmware architecture, peripheral control, and real-time execution

Embedded CCC++ESP32ArduinoMicrocontrollersSensor InterfacingGPIOPWMFreeRTOSHardware–Software Integration
BUS
SELECT →

Communication Buses

Synchronous, asynchronous, and low-latency wireless protocols

UARTSPII²CCANESP-NOWWi-Fi
RTL
SELECT →

Digital / FPGA

Hardware description, register-transfer logic, and FPGA synthesis

Verilog HDLRTL DesignXilinx VivadoModelSimArtix-7 FPGADigital Design
SIM
SELECT →

Control / Simulation

Model-based design, dynamic system simulation, and scenario modeling

MATLABSimulinkControl SystemsRoadRunnerAutomated Driving ToolboxDriving Scenario DesignerOpenRocketModel-Based Design
DEV
SELECT →

Software & Tools

Development environments, scripting, and engineering toolchains

PythonGit & GitHubLinux CLIVS CodeREST APIs
DOMAIN DOSSIER // MCUEmbedded Systems
ACTIVE DOMAIN
Primary Toolchain & IDEs:
ESP-IDFArduino IDEFreeRTOS KernelVS CodeLogic Analyzers
Applied in Projects:
V2V Autonomous Vehicle Control
Mobile Smart Home Automation
Flight Computer Subsystem
Engineering Highlights:
  • Dual-core task pinning and FreeRTOS queue management
  • Deterministic microsecond interrupt service routines (ISR)
  • Non-blocking GPIO and precision PWM motor control
HONORS // COMPETITIONS

Major Achievements

NATIONAL LEVEL MERIT
01// 2025
1st of 50,000+ Teams

National Winner — Smart India Hackathon 2025

Organized by: AICTE × MathWorks
Winning Solution & Domain:

TwinX / High-Fidelity Indian Traffic Simulation

Prize Award
₹1,50,000 Cash Prize
02// 2026
Champion

First Prize — Unplugged Hackathon

Organized by: DJ Sanghvi College of Engineering
Winning Solution & Domain:

Real-Time Image Deduplication Engine on Artix-7 FPGA

Prize Award
₹25,000 Cash Prize
RESEARCH // SCHOLARLY WORK

Publications

PEER-REVIEWED PAPERS
JOURNALPUBLISHEDMay 2026

V2V-Based Autonomous Vehicle Control Prototype Using Edge Computing

International Journal of Emerging Trends in Engineering and Development (IJETED)

01
CONFERENCEPUBLISHEDDec 2025

IoT-Oriented Low-Power ALU with Dynamic Mode Switching for Energy Harvesting Applications

International Conference on Interdisciplinary Technology & Science Convergence (ICITSC)

Xilinx VivadoModelSimDigital Design
02
// CREDENTIALSCERTIFICATIONS & CONTINUOUS LEARNING

Professional Certifications

Formal validation in simulation, C programming, and industrial networking, with ongoing technical expansion.

Verified Credentials

3 COMPLETE

MATLAB & Simulink Onramp

Issuer: MathWorks

VERIFIED

C Programming Certification

Issuer: Spoken Tutorial, IIT Bombay

VERIFIED

Introduction to Quantum Computing

Issuer: NPTEL / SWAYAM

VERIFIED

Currently In Progress

1 ACTIVE

Cisco CCNA 200-301

Track: Networking

IN PROGRESS
// LEADERSHIPCOORDINATION & ACTIVITIES

Leadership & Campus Roles

Engineering team coordination, technical placement representation, and hardware competition management.

Team Antariiksh

Avionics Sub-Lead

Leading avionics subsystem architecture, telemetry coordination, and embedded prototyping.

CAMPUS RESPONSIBILITYACTIVE RECORD
Training & Placement Cell

Student Coordinator

Coordinating technical recruitment drives, company relations, and student orientation.

CAMPUS RESPONSIBILITYACTIVE RECORD
Telekinesis Techfest

Circuit Trace Competition Head

Designing circuit debugging challenges, rule formulation, and competition evaluation.

CAMPUS RESPONSIBILITYACTIVE RECORD
// 07CONTACT & COLLABORATION

Let's Build Something

Interested in firmware development, real-time control, FPGA RTL design, or research collaboration? Reach out directly via email or connect on professional platforms.

Primary InboxDirect Engineering Contact
AVAILABLE

Email Address

LOCATION — Nashik, Maharashtra, India
Available for embedded software roles, firmware engineering, aerospace avionics research, and hardware–software integration projects.
NASHIK / PUNE / BANGALORE / REMOTESTATUS: ACTIVE
Repositories & Code
github.com/Abhishek3m4
Professional Network
linkedin.com/in/abhishek-ahirrao334
Academic Affiliation
K.K. Wagh Institute of Engineering Education & Research, Nashik
Dept. of Electronics & Telecommunication Engineering